#include <IOKit/pci/IOPCIFamilyDefinitions.h>
IOKit/pci/IOPCIFamilyDefinitions.h
macroIOPCIDefinitions_h
#define IOPCIDefinitions_h
macrokIOPCIPrimaryMatchKey
#define kIOPCIPrimaryMatchKey "IOPCIPrimaryMatch"
macrokIOPCISecondaryMatchKey
#define kIOPCISecondaryMatchKey "IOPCISecondaryMatch"
macrokIOPCIClassMatchKey
#define kIOPCIClassMatchKey "IOPCIClassMatch"
macrokIOPCIExpressCapabilitiesKey
pci express capabilities
#define kIOPCIExpressCapabilitiesKey "IOPCIExpressCapabilities"
macrokIOPCIExpressLinkStatusKey
pci express link status
#define kIOPCIExpressLinkStatusKey "IOPCIExpressLinkStatus"
macrokIOPCIExpressLinkCapabilitiesKey
pci express link capabilities
#define kIOPCIExpressLinkCapabilitiesKey "IOPCIExpressLinkCapabilities"
macrokIOPCIExpressDeviceCapabilitiesKey
pci express device capabilities
#define kIOPCIExpressDeviceCapabilitiesKey "IOPCIExpressDeviceCapabilities"
macrokIOPCIExpressSlotStatusKey
pci express slot status
#define kIOPCIExpressSlotStatusKey "IOPCIExpressSlotStatus"
macrokIOPCIExpressSlotCapabilitiesKey
pci express slot capabilities
#define kIOPCIExpressSlotCapabilitiesKey "IOPCIExpressSlotCapabilities"
macrokIOPCIExpressRootCapabilitiesKey
pci express root capabilities
#define kIOPCIExpressRootCapabilitiesKey "IOPCIExpressRootCapabilities"
macrokIOPCIExpressDeviceCapabilities2Key
pci express device capabilities 2
#define kIOPCIExpressDeviceCapabilities2Key "IOPCIExpressDeviceCapabilities2"
macrokIOPCIExpressLinkCapabilities2Key
pci express link capabilities 2
#define kIOPCIExpressLinkCapabilities2Key "IOPCIExpressLinkCapabilities2"
macrokIOPCIExpressSlotCapabilities2Key
pci express slot capabilities 2
#define kIOPCIExpressSlotCapabilities2Key "IOPCIExpressSlotCapabilities2"
macrokIOPCIPowerManagementCapabilitiesKey
Power Management Capabilities Register
#define kIOPCIPowerManagementCapabilitiesKey "IOPCIPowerManagementCapabilities"
macrokIOPCIMSIMessageControlKey
MSI Message Control Register
#define kIOPCIMSIMessageControlKey "IOPCIMSIMessageControl"
macrokIOPCIMSIXMessageControlKey
MSI-X Message Control Register
#define kIOPCIMSIXMessageControlKey "IOPCIMSIXMessageControl"
macrokIOPCIACSCapabilitiesKey
ACS Capability Register
#define kIOPCIACSCapabilitiesKey "IOPCIACSCapabilities"
macrokIOPCIL1PMCapabilitiesKey
L1PM Substates Capabilities Register
#define kIOPCIL1PMCapabilitiesKey "IOPCIL1PMCapabilities"
macrokIOPCIAERCapabilitiesKey
AER Capabilities and Control Register
#define kIOPCIAERCapabilitiesKey "IOPCIAERCapabilities"
macrokIOPCIFPBCapabilitiesKey
FPB Capability Register
#define kIOPCIFPBCapabilitiesKey "IOPCIFPBCapabilities"
macrokIOPCIPTMCapabilitiesKey
PTM Capability Register
#define kIOPCIPTMCapabilitiesKey "IOPCIPTMCapabilities"
macrokIOPCIDeviceMemoryArrayKey
#define kIOPCIDeviceMemoryArrayKey "IODeviceMemory"
macrokIOPCIDeviceMemoryMapBase
base address of the device's memory map
#define kIOPCIDeviceMemoryMapBase "IOPCIDeviceMemoryMapBase"
macrokIOPCIDeviceMemoryMapSize
size of device memory map
#define kIOPCIDeviceMemoryMapSize "IOPCIDeviceMemoryMapSize"
macrokIOPCIDeviceMapperPageSize
mapper page size
#define kIOPCIDeviceMapperPageSize "IOPCIDeviceMapperPageSize"
macrokIOPCITunnelCompatibleKey
IOPCIDevice matching property names
#define kIOPCITunnelCompatibleKey "IOPCITunnelCompatible"
macrokIOPCITunnelledKey
#define kIOPCITunnelledKey "IOPCITunnelled"
macrokIOPCITunnelL1EnableKey
#define kIOPCITunnelL1EnableKey "IOPCITunnelL1Enable"
macrokIOPCITunnelRootDeviceModelIDKey
#define kIOPCITunnelRootDeviceModelIDKey "IOPCITunnelRootDeviceModelID"
macrokIOPCITunnelRootDeviceVendorIDKey
#define kIOPCITunnelRootDeviceVendorIDKey "IOPCITunnelRootDeviceVendorID"
macrokIOPCIPauseCompatibleKey
#define kIOPCIPauseCompatibleKey "IOPCIPauseCompatible"
macrokIOPMPCIConfigSpaceVolatileKey
Properties that can be set on the IOPCIDevice
property to control PCI default config space save on sleep.
If false, config space will not be save/restored on power state transitions
#define kIOPMPCIConfigSpaceVolatileKey "IOPMPCIConfigSpaceVolatile"
macrokIOPMPCISleepLinkDisableKey
property to disable express link on sleep
#define kIOPMPCISleepLinkDisableKey "IOPMPCISleepLinkDisable"
macrokIOPMPCISleepResetKey
property to issue a secondary bus reset on sleep
#define kIOPMPCISleepResetKey "IOPMPCISleepReset"
macrokIOPCIRetrainLinkMaskKey
property to provide bitmask for link train while scanning
#define kIOPCIRetrainLinkMaskKey "IOPCIRetrainLinkMask"
macrokIOPCIRetrainLinkKey
property to issue a link retrain while on wake
#define kIOPCIRetrainLinkKey "IOPCIRetrainLink"
macrokIOPCIEndpointPrsnt
property to check if endpoint is present on bridge
#define kIOPCIEndpointPrsnt "IOPCIEndpointPrsnt"
macrokIOPCIWaitForLinkUpKey
property to change the wait time for link up from spec default
#define kIOPCIWaitForLinkUpKey "wait-for-link-up"
macrokIOPCIDeviceCrashResetType
property to override the dext crash reset type
#define kIOPCIDeviceCrashResetType "IOPCIDeviceCrashResetType"
macrokIOPCIKernelMemoryAccess
property to route driverkit memory accesses through the kernel
#define kIOPCIKernelMemoryAccess "IOPCIKernelMemoryAccess"
enum(anonymous)
bits getInterruptType result
| kIOInterruptTypePCIMessaged | 65536 | |
| kIOInterruptTypePCIMessagedX | 131072 |
enum(anonymous)
Definitions of PCI Config Registers
| kIOPCIConfigurationOffsetVendorID | 0 | |
| kIOPCIConfigurationOffsetDeviceID | 2 | |
| kIOPCIConfigurationOffsetCommand | 4 | |
| kIOPCIConfigurationOffsetStatus | 6 | |
| kIOPCIConfigurationOffsetRevisionID | 8 | |
| kIOPCIConfigurationOffsetClassCode | 9 | |
| kIOPCIConfigurationOffsetCacheLineSize | 12 | |
| kIOPCIConfigurationOffsetLatencyTimer | 13 | |
| kIOPCIConfigurationOffsetHeaderType | 14 | |
| kIOPCIConfigurationOffsetBIST | 15 | |
| kIOPCIConfigurationOffsetBaseAddress0 | 16 | |
| kIOPCIConfigurationOffsetBaseAddress1 | 20 | |
| kIOPCIConfigurationOffsetBaseAddress2 | 24 | |
| kIOPCIConfigurationOffsetBaseAddress3 | 28 | |
| kIOPCIConfigurationOffsetBaseAddress4 | 32 | |
| kIOPCIConfigurationOffsetBaseAddress5 | 36 | |
| kIOPCIConfigurationOffsetCardBusCISPtr | 40 | |
| kIOPCIConfigurationOffsetSubSystemVendorID | 44 | |
| kIOPCIConfigurationOffsetSubSystemID | 46 | |
| kIOPCIConfigurationOffsetExpansionROMBase | 48 | |
| kIOPCIConfigurationOffsetCapabilitiesPtr | 52 | |
| kIOPCIConfigurationOffsetInterruptLine | 60 | |
| kIOPCIConfigurationOffsetInterruptPin | 61 | |
| kIOPCIConfigurationOffsetMinimumGrant | 62 | |
| kIOPCIConfigurationOffsetMaximumLatency | 63 |
enum(anonymous)
Definitions of Capabilities PCI Config Register
| kIOPCICapabilityIDOffset | 0 | |
| kIOPCINextCapabilityOffset | 1 | |
| kIOPCICapabilityIDPowerManagement | 1 | |
| kIOPCICapabilityIDAGP | 2 | |
| kIOPCICapabilityIDVitalProductData | 3 | |
| kIOPCICapabilityIDSlotID | 4 | |
| kIOPCICapabilityIDMSI | 5 | |
| kIOPCICapabilityIDCPCIHotswap | 6 | |
| kIOPCICapabilityIDPCIX | 7 | |
| kIOPCICapabilityIDLDT | 8 | |
| kIOPCICapabilityIDVendorSpecific | 9 | |
| kIOPCICapabilityIDDebugPort | 10 | |
| kIOPCICapabilityIDCPCIResourceControl | 11 | |
| kIOPCICapabilityIDHotplug | 12 | |
| kIOPCICapabilityIDAGP8 | 14 | |
| kIOPCICapabilityIDSecure | 15 | |
| kIOPCICapabilityIDPCIExpress | 16 | |
| kIOPCICapabilityIDMSIX | 17 | |
| kIOPCICapabilityIDSATAConfiguration | 18 | |
| kIOPCICapabilityIDAF | 19 | |
| kIOPCICapabilityIDEnhancedAllocation | 20 | |
| kIOPCICapabilityIDFPB | 21 | |
| kIOPCIExpressCapabilityIDErrorReporting | 4294967295 | |
| kIOPCIExpressCapabilityIDVirtualChannel | 4294967294 | |
| kIOPCIExpressCapabilityIDDeviceSerialNumber | 4294967293 | |
| kIOPCIExpressCapabilityIDPowerBudget | 4294967292 | |
| kIOPCIExpressCapabilityIDRCLinkDeclaration | 4294967291 | |
| kIOPCIExpressCapabilityIDRCInternalLinkCtrl | 4294967290 | |
| kIOPCIExpressCapabilityIDRCECEndpointAssociation | 4294967289 | |
| kIOPCIExpressCapabilityIDMFVC | 4294967288 | |
| kIOPCIExpressCapabilityIDVC_MFVCPresent | 4294967287 | |
| kIOPCIExpressCapabilityIDRootComplexRegBlock | 4294967286 | |
| kIOPCIExpressCapabilityIDVSEC | 4294967285 | |
| kIOPCIExpressCapabilityIDCAC | 4294967284 | |
| kIOPCIExpressCapabilityIDAccessControlServices | 4294967283 | |
| kIOPCIExpressCapabilityIDAlternativeRoutingID | 4294967282 | |
| kIOPCIExpressCapabilityIDATS | 4294967281 | |
| kIOPCIExpressCapabilityIDSRIOV | 4294967280 | |
| kIOPCIExpressCapabilityIDMRIOV | 4294967279 | |
| kIOPCIExpressCapabilityIDMulticast | 4294967278 | |
| kIOPCIExpressCapabilityIDPRI | 4294967277 | |
| kIOPCIExpressCapabilityIDAMD | 4294967276 | |
| kIOPCIExpressCapabilityIDResizableBAR | 4294967275 | |
| kIOPCIExpressCapabilityIDDPA | 4294967274 | |
| kIOPCIExpressCapabilityIDTPHRequester | 4294967273 | |
| kIOPCIExpressCapabilityIDLatencyTolerenceReporting | 4294967272 | |
| kIOPCIExpressCapabilityIDSPCIe | 4294967271 | |
| kIOPCIExpressCapabilityIDPMUX | 4294967270 | |
| kIOPCIExpressCapabilityIDPASID | 4294967269 | |
| kIOPCIExpressCapabilityIDLNR | 4294967268 | |
| kIOPCIExpressCapabilityIDDPC | 4294967267 | |
| kIOPCIExpressCapabilityIDL1PMSubstates | 4294967266 | |
| kIOPCIExpressCapabilityIDPrecisionTimeManagement | 4294967265 | |
| kIOPCIExpressCapabilityIDMPCIe | 4294967264 | |
| kIOPCIExpressCapabilityIDFRSQueueing | 4294967263 | |
| kIOPCIExpressCapabilityIDReadinessTimeReporting | 4294967262 | |
| kIOPCIExpressCapabilityIDDVSEC | 4294967261 | |
| kIOPCIExpressCapabilityIDVFResizableBAR | 4294967260 | |
| kIOPCIExpressCapabilityIDDataLinkFeature | 4294967259 | |
| kIOPCIExpressCapabilityIDPL16GTs | 4294967258 | |
| kIOPCIExpressCapabilityIDLaneMarginingRx | 4294967257 | |
| kIOPCIExpressCapabilityIDHierarchyID | 4294967256 | |
| kIOPCIExpressCapabilityIDNPEM | 4294967255 | |
| kIOPCIExpressCapabilityIDPL32GTs | 4294967254 | |
| kIOPCIExpressCapabilityIDAlternateProtocol | 4294967253 | |
| kIOPCIExpressCapabilityIDSFI | 4294967252 |
enum(anonymous)
Command register definitions
| kIOPCICommandIOSpace | 1 | |
| kIOPCICommandMemorySpace | 2 | |
| kIOPCICommandBusLead | 4 | |
| kIOPCICommandBusMaster | 4 | |
| kIOPCICommandSpecialCycles | 8 | |
| kIOPCICommandMemWrInvalidate | 16 | |
| kIOPCICommandPaletteSnoop | 32 | |
| kIOPCICommandParityError | 64 | |
| kIOPCICommandAddressStepping | 128 | |
| kIOPCICommandSERR | 256 | |
| kIOPCICommandFastBack2Back | 512 | |
| kIOPCICommandInterruptDisable | 1024 |
enum(anonymous)
Status register definitions
| kIOPCIStatusInterrupt | 8 | |
| kIOPCIStatusCapabilities | 16 | |
| kIOPCIStatusPCI66 | 32 | |
| kIOPCIStatusUDF | 64 | |
| kIOPCIStatusFastBack2Back | 128 | |
| kIOPCIStatusDevSel0 | 0 | |
| kIOPCIStatusDevSel1 | 512 | |
| kIOPCIStatusDevSel2 | 1024 | |
| kIOPCIStatusDevSel3 | 1536 | |
| kIOPCIStatusTargetAbortCapable | 2048 | |
| kIOPCIStatusTargetAbortActive | 4096 | |
| kIOPCIStatusLeadAbortActive | 8192 | |
| kIOPCIStatusMasterAbortActive | 8192 | |
| kIOPCIStatusSERRActive | 16384 | |
| kIOPCIStatusParityErrActive | 32768 |
enum(anonymous)
| kPCI2PCIOffsetPrimaryBus | 24 | |
| kPCI2PCIOffsetSecondaryBus | 25 | |
| kPCI2PCIOffsetSubordinateBus | 26 | |
| kPCI2PCIOffsetSecondaryLT | 27 | |
| kPCI2PCIOffsetIORange | 28 | |
| kPCI2PCIOffsetMemoryRange | 32 | |
| kPCI2PCIOffsetPrefetchMemoryRange | 36 | |
| kPCI2PCIOffsetPrefetchUpperBase | 40 | |
| kPCI2PCIOffsetPrefetchUpperLimit | 44 | |
| kPCI2PCIOffsetUpperIORange | 48 | |
| kPCI2PCIOffsetBridgeControl | 62 |
enum(anonymous)
constants which are part of the PCI Bus Power Management Spec.
| kPCIPMCPMESupportFromD3Cold | 32768 | capabilities bits in the 16 bit capabilities register |
| kPCIPMCPMESupportFromD3Hot | 16384 | |
| kPCIPMCPMESupportFromD2 | 8192 | |
| kPCIPMCPMESupportFromD1 | 4096 | |
| kPCIPMCPMESupportFromD0 | 2048 | |
| kPCIPMCD2Support | 1024 | |
| kPCIPMCD1Support | 512 | |
| kPCIPMCD3Support | 1 |
enum(anonymous)
| kPCIPMCSPMEStatus | 32768 | bits in the power management control/status register |
| kPCIPMCSPMEEnable | 256 | |
| kPCIPMCSPowerStateMask | 3 | |
| kPCIPMCSPowerStateD3 | 3 | |
| kPCIPMCSPowerStateD2 | 2 | |
| kPCIPMCSPowerStateD1 | 1 | |
| kPCIPMCSPowerStateD0 | 0 | |
| kPCIPMCSDefaultEnableBits | 4294967295 | |
| kPCIPMCSPMEDisableInS3 | 65536 | |
| kPCIPMCSPMEWakeReason | 131072 |
enum(anonymous)
| kIOPCISlotCapabilitiesBitAttentionButtonPresent | 1 | |
| kIOPCISlotCapabilitiesBitPowerControllerPresent | 2 | |
| kIOPCISlotCapabilitiesBitMRLSensorPresent | 4 | |
| kIOPCISlotCapabilitiesBitAttentionIndicatorPresent | 8 | |
| kIOPCISlotCapabilitiesBitPowerIndicatorPresent | 16 | |
| kIOPCISlotCapabilitiesBitHotPlugSurprise | 32 | |
| kIOPCISlotCapabilitiesBitHotPlugCapable | 64 | |
| kIOPCISlotCapabilitiesBitElectromechanicalInterlockPresent | 131072 | |
| kIOPCISlotCapabilitiesBitNoCommandCompletedSupport | 262144 |
enum(anonymous)
| kIOPCISlotStatusAttentionButtonPressed | 1 | |
| kIOPCISlotStatusPowerFaultDetected | 2 | |
| kIOPCISlotStatusMRLSensorChanged | 4 | |
| kIOPCISlotStatusPresenceDetectChanged | 8 | |
| kIOPCISlotStatusCommandCompleted | 16 | |
| kIOPCISlotStatusMRLSensorState | 32 | |
| kIOPCISlotStatusPresenceDetectState | 64 | |
| kIOPCISlotStatusElectromechanicalInterlockState | 128 | |
| kIOPCISlotStatusDataLinkLayerStateChanged | 256 |
enum(anonymous)
PCIe error bits
| kIOPCIAERCapCapHeaderOffset | 0 | |
| kIOPCIAERCapUncErrStatusOffset | 4 | |
| kIOPCIAERCapUncErrMaskOffset | 8 | |
| kIOPCIAERCapUncErrSeverityOffset | 12 | |
| kIOPCIAERCapCorErrStatusOffset | 16 | |
| kIOPCIAERCapCorErrMaskOffset | 20 | |
| kIOPCIAERCapCapControlOffset | 24 | |
| kIOPCIAERCapHdrLogDW0Offset | 28 | |
| kIOPCIAERCapHdrLogDW1Offset | 32 | |
| kIOPCIAERCapHdrLogDW2Offset | 36 | |
| kIOPCIAERCapHdrLogDW3Offset | 40 | |
| kIOPCIAERCapRootErrCmdOffset | 44 | |
| kIOPCIAERCapRootErrStatusOffset | 48 | |
| kIOPCIAERCapErrSourceIDOffset | 52 | |
| kIOPCIAERCapTLPPrefixLogDW0Offset | 56 | |
| kIOPCIAERCapTLPPrefixLogDW1Offset | 60 | |
| kIOPCIAERCapTLPPrefixLogDW2Offset | 64 | |
| kIOPCIAERCapTLPPrefixLogDW3Offset | 68 |
enum(anonymous)
| kIOPCIUncorrectableErrorBitDataLinkProtocol | 4 | |
| kIOPCIUncorrectableErrorBitSurpriseDown | 5 | |
| kIOPCIUncorrectableErrorBitPoisonedTLP | 12 | |
| kIOPCIUncorrectableErrorBitFlowControlProtocol | 13 | |
| kIOPCIUncorrectableErrorBitCompletionTimeout | 14 | |
| kIOPCIUncorrectableErrorBitCompleterAbort | 15 | |
| kIOPCIUncorrectableErrorBitUnexpectedCompletion | 16 | |
| kIOPCIUncorrectableErrorBitReceiverOverflow | 17 | |
| kIOPCIUncorrectableErrorBitMalformedTLP | 18 | |
| kIOPCIUncorrectableErrorBitECRC | 19 | |
| kIOPCIUncorrectableErrorBitUnsupportedRequest | 20 | |
| kIOPCIUncorrectableErrorBitACSViolation | 21 | |
| kIOPCIUncorrectableErrorBitInternal | 22 | |
| kIOPCIUncorrectableErrorBitMCBlockedTLP | 23 | |
| kIOPCIUncorrectableErrorBitAtomicOpEgressBlocked | 24 | |
| kIOPCIUncorrectableErrorBitTLPPrefixBlocked | 25 |
enum(anonymous)
| kIOPCICorrectableErrorBitReceiver | 0 | |
| kIOPCICorrectableErrorBitBadTLP | 6 | |
| kIOPCICorrectableErrorBitBadDLLP | 7 | |
| kIOPCICorrectableErrorBitReplayNumRollover | 8 | |
| kIOPCICorrectableErrorBitReplayTimerTimeout | 12 | |
| kIOPCICorrectableErrorBitAdvisoryNonFatal | 13 | |
| kIOPCICorrectableErrorBitCorrectedInternal | 14 | |
| kIOPCICorrectableErrorBitHeaderLogOverflow | 15 |
enumtIOPCILinkSpeed
| kIOPCILinkSpeed_2_5_GTs | 1 | Gen 1 |
| kIOPCILinkSpeed_5_GTs | 2 | Gen 2 |
| kIOPCILinkSpeed_8_GTs | 3 | Gen 3 |
| kIOPCILinkSpeed_16_GTs | 4 | Gen 4 |
| kIOPCILinkSpeed_32_GTs | 5 | Gen 5 |
typedeftIOPCILinkSpeed
typedef enum tIOPCILinkSpeed tIOPCILinkSpeed;
enumtIOPCIDeviceResetTypes
@enum tIOPCIDeviceResetTypes
@constant kIOPCIDeviceResetTypeHotReset Issues a hot reset to the device without power being removed from the device.
This will issue a hot reset from its upstream bridge by setting the secondary bus reset bit in the bridge's control
register.
@constant kIOPCIDeviceResetTypeWarmReset Issues a warm reset to the device without power being removed from the device, if a platform
specific function exists.
@constant kIOPCIDeviceResetTypeWarmResetDisable Performs the first half of a warm reset (e.g. assert PERST#), if a platform
specific function exists. Upon completion, the device is unusable until the caller requests reset with type
kIOPCIDeviceResetTypeWarmResetEnable.
This type facilitates the generation of a cold reset, i.e. by removing power before using kIOPCIDeviceResetTypeWarmResetDisable
and re-applying it before using kIOPCIDeviceResetTypeWarmResetEnable.
@constant kIOPCIDeviceResetTypeWarmResetEnable Completes the warm reset operation initiated with type kIOPCIDeviceResetTypeWarmResetDisable
(e.g. deassert PERST#). See kIOPCIDeviceResetTypeWarmResetDisable for more details.
@constant kIOPCIDeviceResetTypeFunctionReset Issues a function-level reset, if supported.
| kIOPCIDeviceResetTypeHotReset | 1 | |
| kIOPCIDeviceResetTypeWarmReset | 2 | |
| kIOPCIDeviceResetTypeWarmResetDisable | 4 | |
| kIOPCIDeviceResetTypeWarmResetEnable | 8 | |
| kIOPCIDeviceResetTypeFunctionReset | 16 |
typedeftIOPCIDeviceResetTypes
typedef enum tIOPCIDeviceResetTypes tIOPCIDeviceResetTypes;
enumtIOPCIDeviceResetOptions
@enum tIOPCIDeviceResetOptions
@constant kIOPCIDeviceResetOptionNone No options selected
@constant kIOPCIDeviceResetOptionTerminate Terminate the IOPCIDevice(s) that were reset and re-probe the bus. This will stop
any attached client drivers. Devices with reset-initiated personality changes should use this option.
This option causes the reset function to initiate the asynchronous termination process, but not block on its completion.
| kIOPCIDeviceResetOptionNone | 0 | |
| kIOPCIDeviceResetOptionTerminate | 1 |
typedeftIOPCIDeviceResetOptions
typedef enum tIOPCIDeviceResetOptions tIOPCIDeviceResetOptions;
enumtIOPCILinkControlASPMBits
| kIOPCILinkControlASPMBitsDisabled | 0 | |
| kIOPCILinkControlASPMBitsL0s | 1 | |
| kIOPCILinkControlASPMBitsL1 | 2 | |
| kIOPCILinkControlASPMBitsL0sL1 | 3 |
enumtIOPCIAccessOptions
@enum tIOPCIAccessOptions
@brief Options passed to memory space accessor functions
@constant kIOPCIAccessLatencyTolerantHint Hint to host software that this PCIe access is not in a performance critical section,
and host software is permitted to offload the access to a DMA engine in order to free the CPU for other work to
optimize overall system performance. Use of this hint may increase the latency of the memory space accessor function.
| kIOPCIAccessLatencyTolerantHint | 1 |
typedeftIOPCIAccessOptions
typedef enum tIOPCIAccessOptions tIOPCIAccessOptions;