#include <arm/machine_cpuid.h>

arm/machine_cpuid.h Kernel.framework

CPU feature identification
7 typedefs · 4 unions · 3 structs · 1 function

structarm_feature_bits_t

size 4, align 4
uint32_t:4arm_32bit_isa
uint32_t:4arm_thumb_ver
uint32_t:4arm_jazelle
uint32_t:4arm_thumb2
uint32_t:16reserved

typedefarm_feature_bits_t

typedef struct arm_feature_bits_t arm_feature_bits_t;

unionarm_feature0_reg_t

size 4, align 4
arm_feature_bits_tfield
uint32_tvalue

typedefarm_feature0_reg_t

typedef union arm_feature0_reg_t arm_feature0_reg_t;

structsyscp_ID_instructions_feat_1_reg

Register 0, subtype 21: Instruction Set Features #1
size 4, align 4
uint32_t:4endianness_support
uint32_t:4exception_1_support
uint32_t:4exception_2_support
uint32_t:4sign_zero_ext_support
uint32_t:4if_then_support
uint32_t:4immediate_support
uint32_t:4interworking_support
uint32_t:4jazelle_support

typedefsyscp_ID_instructions_feat_1_reg

typedef struct syscp_ID_instructions_feat_1_reg syscp_ID_instructions_feat_1_reg;

unionarm_isa_feat1_reg

size 4, align 4
uint32_tvalue
syscp_ID_instructions_feat_1_regfield

typedefarm_isa_feat1_reg

typedef union arm_isa_feat1_reg arm_isa_feat1_reg;

functionmachine_read_isa_feat1

arm_isa_feat1_reg machine_read_isa_feat1(void)
claude-fable-5, 2026-08-24 · not from Apple sources · verified against xnu osfmk/arm/machine_cpuid.h
Returns the contents of the CPU's Instruction Set Attribute Register 1 as an arm_isa_feat1_reg union, whose bit-fields report endianness, exception handling, sign/zero extension, if-then (IT), immediate, interworking, and Jazelle instruction support. Legacy 32-bit ARM CPU identification interface; no implementation is present in current arm64 xnu sources.

unionarm_cpuid_id_dfr0

ID_DFR0
size 4, align 4
unnamed struct at Kernel/arm/machine_cpuid.h:70:2debug_feature
uint32_t:4coprocessor_core_debug
uint32_t:4coprocessor_secure_debug
uint32_t:4memory_mapped_core_debug
uint32_t:4coprocessor_trace_debug
uint32_t:4memory_mapped_trace_debug
uint32_t:4microcontroller_debug
uint32_tvalue

typedefarm_cpuid_id_dfr0

typedef union arm_cpuid_id_dfr0 arm_cpuid_id_dfr0;

unionarm_debug_dbgdidr

DBGDIDR
size 4, align 4
unnamed struct at Kernel/arm/machine_cpuid.h:83:2debug_id
uint32_t:4revision
uint32_t:4variant
uint32_t:4
uint32_t:1se_imp
uint32_t:1pcsr_imp
uint32_t:1nsuhd_imp
uint32_t:1
uint32_t:4version
uint32_t:4ctx_cmps
uint32_t:4brps
uint32_t:4wrps
uint32_tvalue

typedefarm_debug_dbgdidr

typedef union arm_debug_dbgdidr arm_debug_dbgdidr;

structarm_debug_info_t

size 16, align 4
boolean_tmemory_mapped_core_debug
boolean_tcoprocessor_core_debug
uint32_tnum_watchpoint_pairs
uint32_tnum_breakpoint_pairs

typedefarm_debug_info_t

typedef struct arm_debug_info_t arm_debug_info_t;