Saved-state (exception frame) accessors

osfmk/mach/arm/thread_status.h · 1244 lines · browse source

Inline accessors for arm_saved_state_t, the register frame saved on kernel entry. get_saved_state_pc/sp/lr/fp/reg and their setters read and write the interrupted thread's state, handling the 32- vs 64-bit layouts; used throughout the exception and trap handlers.

check_and_sign_copied_user_thread_state source
static inline void
check_and_sign_copied_user_thread_state(arm_saved_state_t *dst, const arm_saved_state_t *src)
{
	MANIPULATE_SIGNED_USER_THREAD_STATE(src,
	    "mov	x0, %[dst]",
	    [dst] "r"(dst)
	    );
}
is_saved_state32 source
HAS_APPLE_PAC
static inline boolean_t
is_saved_state32(const arm_saved_state_t *iss)
{
	return iss->ash.flavor == ARM_SAVED_STATE32;
}
is_saved_state64 source
static inline boolean_t
is_saved_state64(const arm_saved_state_t *iss)
{
	return iss->ash.flavor == ARM_SAVED_STATE64;
}
saved_state32 source
static inline arm_saved_state32_t*
saved_state32(arm_saved_state_t *iss)
{
	return &iss->ss_32;
}
const_saved_state32 source
static inline const arm_saved_state32_t*
const_saved_state32(const arm_saved_state_t *iss)
{
	return &iss->ss_32;
}
saved_state64 source
static inline arm_saved_state64_t*
saved_state64(arm_saved_state_t *iss)
{
	return &iss->ss_64;
}
const_saved_state64 source
static inline const arm_saved_state64_t*
const_saved_state64(const arm_saved_state_t *iss)
{
	return &iss->ss_64;
}
add_saved_state_pc source
static inline void
add_saved_state_pc(arm_saved_state_t *iss, int diff)
{
	if (is_saved_state32(iss)) {
		uint64_t pc = saved_state32(iss)->pc + (uint32_t)diff;
		saved_state32(iss)->pc = CAST_ASSERT_SAFE(uint32_t, pc);
	} else {
#if HAS_APPLE_PAC
		MANIPULATE_SIGNED_THREAD_STATE(iss,
		    "mov	w6, %w[diff]		\n"
		    "add	x1, x1, w6, sxtw	\n"
		    "str	x1, [x0, %[SS64_PC]]	\n",
		    [diff] "r"(diff)
		    );
#else
		saved_state64(iss)->pc += (unsigned long)diff;
#endif /* HAS_APPLE_PAC */
	}
}
add_user_saved_state_pc source
HAS_ADD_SAVED_STATE_PC
static inline void
add_user_saved_state_pc(arm_saved_state_t *iss, int diff)
{
	if (is_saved_state32(iss)) {
		uint64_t pc = saved_state32(iss)->pc + (uint32_t)diff;
		saved_state32(iss)->pc = CAST_ASSERT_SAFE(uint32_t, pc);
	} else {
#if HAS_APPLE_PAC
		MANIPULATE_SIGNED_USER_THREAD_STATE(iss,
		    "mov	w6, %w[diff]		\n"
		    "add	x1, x1, w6, sxtw	\n"
		    "str	x1, [x0, %[SS64_PC]]	\n",
		    [diff] "r"(diff)
		    );
#else
		saved_state64(iss)->pc += (unsigned long)diff;
#endif /* HAS_APPLE_PAC */
	}
}
set_saved_state_pc source
static inline void
set_saved_state_pc(arm_saved_state_t *iss, register_t pc)
{
	if (is_saved_state32(iss)) {
		saved_state32(iss)->pc = CAST_ASSERT_SAFE(uint32_t, pc);
	} else {
#if HAS_APPLE_PAC
		MANIPULATE_SIGNED_THREAD_STATE(iss,
		    "mov	x1, %[pc]		\n"
		    "str	x1, [x0, %[SS64_PC]]	\n",
		    [pc] "r"(pc)
		    );
#else
		saved_state64(iss)->pc = (unsigned long)pc;
#endif /* HAS_APPLE_PAC */
	}
}
set_user_saved_state_pc source
HAS_SET_SAVED_STATE_PC
static inline void
set_user_saved_state_pc(arm_saved_state_t *iss, register_t pc)
{
	if (is_saved_state32(iss)) {
		saved_state32(iss)->pc = CAST_ASSERT_SAFE(uint32_t, pc);
	} else {
#if HAS_APPLE_PAC
		MANIPULATE_SIGNED_USER_THREAD_STATE(iss,
		    "mov	x1, %[pc]		\n"
		    "str	x1, [x0, %[SS64_PC]]	\n",
		    [pc] "r"(pc)
		    );
#else
		saved_state64(iss)->pc = (unsigned long)pc;
#endif /* HAS_APPLE_PAC */
	}
}
set_saved_state_sp source
static inline void
set_saved_state_sp(arm_saved_state_t *iss, register_t sp)
{
	if (is_saved_state32(iss)) {
		saved_state32(iss)->sp = CAST_ASSERT_SAFE(uint32_t, sp);
	} else {
		saved_state64(iss)->sp = (uint64_t)sp;
	}
}
set_saved_state_lr source
static inline void
set_saved_state_lr(arm_saved_state_t *iss, register_t lr)
{
	if (is_saved_state32(iss)) {
		saved_state32(iss)->lr = CAST_ASSERT_SAFE(uint32_t, lr);
	} else {
#if HAS_APPLE_PAC
		MANIPULATE_SIGNED_THREAD_STATE(iss,
		    "mov	x3, %[lr]		\n"
		    "str	x3, [x0, %[SS64_LR]]	\n",
		    [lr] "r"(lr)
		    );
#else
		saved_state64(iss)->lr = (unsigned long)lr;
#endif /* HAS_APPLE_PAC */
	}
}
set_user_saved_state_lr source
HAS_SET_SAVED_STATE_PC
static inline void
set_user_saved_state_lr(arm_saved_state_t *iss, register_t lr)
{
	if (is_saved_state32(iss)) {
		saved_state32(iss)->lr = CAST_ASSERT_SAFE(uint32_t, lr);
	} else {
#if HAS_APPLE_PAC
		MANIPULATE_SIGNED_USER_THREAD_STATE(iss,
		    "mov	x3, %[lr]		\n"
		    "str	x3, [x0, %[SS64_LR]]	\n",
		    [lr] "r"(lr)
		    );
#else
		saved_state64(iss)->lr = (unsigned long)lr;
#endif /* HAS_APPLE_PAC */
	}
}
set_saved_state_fp source
static inline void
set_saved_state_fp(arm_saved_state_t *iss, register_t fp)
{
	if (is_saved_state32(iss)) {
		saved_state32(iss)->r[7] = CAST_ASSERT_SAFE(uint32_t, fp);
	} else {
		saved_state64(iss)->fp = (uint64_t)fp;
	}
}
check_saved_state_reglimit source
static inline int
check_saved_state_reglimit(const arm_saved_state_t *iss, unsigned reg)
{
	return is_saved_state32(iss) ? (reg < ARM_SAVED_STATE32_COUNT) : (reg < ARM_SAVED_STATE64_COUNT);
}
get_saved_state_reg source
static inline register_t
get_saved_state_reg(const arm_saved_state_t *iss, unsigned reg)
{
	if (!check_saved_state_reglimit(iss, reg)) {
		return 0;
	}

	return (register_t)(is_saved_state32(iss) ? (const_saved_state32(iss)->r[reg]) : (const_saved_state64(iss)->x[reg]));
}
set_saved_state_reg source
static inline void
set_saved_state_reg(arm_saved_state_t *iss, unsigned reg, register_t value)
{
	if (!check_saved_state_reglimit(iss, reg)) {
		return;
	}

	if (is_saved_state32(iss)) {
		saved_state32(iss)->r[reg] = CAST_ASSERT_SAFE(uint32_t, value);
	} else {
#if HAS_APPLE_PAC
		/* x16 and x17 are part of the jophash */
		if (reg == 16) {
			MANIPULATE_SIGNED_THREAD_STATE(iss,
			    "mov	x4, %[value]		\n"
			    "str	x4, [x0, %[SS64_X16]]	\n",
			    [value] "r"(value)
			    );
			return;
		} else if (reg == 17) {
			MANIPULATE_SIGNED_THREAD_STATE(iss,
			    "mov	x5, %[value]		\n"
			    "str	x5, [x0, %[SS64_X17]]	\n",
			    [value] "r"(value),
			    [SS64_X17] "i"(ss64_offsetof(x[17]))
			    );
			return;
		}
#endif
		saved_state64(iss)->x[reg] = (uint64_t)value;
… more in source
set_user_saved_state_reg source
HAS_SET_SAVED_STATE_REG
static inline void
set_user_saved_state_reg(arm_saved_state_t *iss, unsigned reg, register_t value)
{
	if (!check_saved_state_reglimit(iss, reg)) {
		return;
	}

	if (is_saved_state32(iss)) {
		saved_state32(iss)->r[reg] = CAST_ASSERT_SAFE(uint32_t, value);
	} else {
#if HAS_APPLE_PAC
		/* x16 and x17 are part of the jophash */
		if (reg == 16) {
			MANIPULATE_SIGNED_USER_THREAD_STATE(iss,
			    "mov	x4, %[value]		\n"
			    "str	x4, [x0, %[SS64_X16]]	\n",
			    [value] "r"(value)
			    );
			return;
		} else if (reg == 17) {
			MANIPULATE_SIGNED_USER_THREAD_STATE(iss,
			    "mov	x5, %[value]		\n"
			    "str	x5, [x0, %[SS64_X17]]	\n",
			    [value] "r"(value),
			    [SS64_X17] "i"(ss64_offsetof(x[17]))
			    );
			return;
		}
#endif
		saved_state64(iss)->x[reg] = (uint64_t)value;
… more in source
get_saved_state_cpsr source
static inline uint32_t
get_saved_state_cpsr(const arm_saved_state_t *iss)
{
	return is_saved_state32(iss) ? const_saved_state32(iss)->cpsr : const_saved_state64(iss)->cpsr;
}
mask_saved_state_cpsr source
static inline void
mask_saved_state_cpsr(arm_saved_state_t *iss, uint32_t set_bits, uint32_t clear_bits)
{
	if (is_saved_state32(iss)) {
		saved_state32(iss)->cpsr |= set_bits;
		saved_state32(iss)->cpsr &= ~clear_bits;
	} else {
#if HAS_APPLE_PAC
		MANIPULATE_SIGNED_THREAD_STATE(iss,
		    "mov	w6, %w[set_bits]	\n"
		    "orr	w2, w2, w6, lsl #0	\n"
		    "mov	w6, %w[clear_bits]	\n"
		    "bic	w2, w2, w6, lsl #0	\n"
		    "str	w2, [x0, %[SS64_CPSR]]	\n",
		    [set_bits] "r"(set_bits),
		    [clear_bits] "r"(clear_bits)
		    );
#else
		saved_state64(iss)->cpsr |= set_bits;
		saved_state64(iss)->cpsr &= ~clear_bits;
#endif /* HAS_APPLE_PAC */
	}
}
mask_user_saved_state_cpsr source
HAS_MASK_SAVED_STATE_CPSR
static inline void
mask_user_saved_state_cpsr(arm_saved_state_t *iss, uint32_t set_bits, uint32_t clear_bits)
{
	if (is_saved_state32(iss)) {
		uint32_t new_cpsr = saved_state32(iss)->cpsr;
		new_cpsr |= set_bits;
		new_cpsr &= ~clear_bits;
		if (!PSR_IS_USER(new_cpsr)) {
			ml_panic_on_invalid_new_cpsr(iss, new_cpsr);
		}
		saved_state32(iss)->cpsr = new_cpsr;
	} else {
#if HAS_APPLE_PAC
		MANIPULATE_SIGNED_USER_THREAD_STATE(iss,
		    "mov	w6, %w[set_bits]		\n"
		    "orr	w2, w2, w6, lsl #0		\n"
		    "mov	w6, %w[clear_bits]		\n"
		    "bic	w2, w2, w6, lsl #0		\n"
		    "and	w6, w2, %[CPSR_EL_MASK]		\n"
		    "cmp	w6, %[CPSR_EL0]			\n"
		    "b.eq	1f				\n"
		    "mov	w1, w2				\n"
		    "bl		_ml_panic_on_invalid_new_cpsr	\n"
		    "brk	#0				\n"
		    "1:						\n"
		    "str	w2, [x0, %[SS64_CPSR]]		\n",
		    [set_bits] "r"(set_bits),
		    [clear_bits] "r"(clear_bits)
		    );
#else
… more in source
set_saved_state_cpsr source
static inline void
set_saved_state_cpsr(arm_saved_state_t *iss, uint32_t cpsr)
{
	if (is_saved_state32(iss)) {
		saved_state32(iss)->cpsr = cpsr;
	} else {
#if HAS_APPLE_PAC
		MANIPULATE_SIGNED_THREAD_STATE(iss,
		    "mov	w2, %w[cpsr]		\n"
		    "str	w2, [x0, %[SS64_CPSR]]	\n",
		    [cpsr] "r"(cpsr)
		    );
#else
		saved_state64(iss)->cpsr = cpsr;
#endif /* HAS_APPLE_PAC */
	}
}
set_user_saved_state_cpsr source
HAS_SET_SAVED_STATE_CPSR
static inline void
set_user_saved_state_cpsr(arm_saved_state_t *iss, uint32_t cpsr)
{
	if (is_saved_state32(iss)) {
		if (!PSR_IS_USER(cpsr)) {
			ml_panic_on_invalid_new_cpsr(iss, cpsr);
		}
		saved_state32(iss)->cpsr = cpsr;
	} else {
#if HAS_APPLE_PAC
		MANIPULATE_SIGNED_USER_THREAD_STATE(iss,
		    "mov	w2, %w[cpsr]			\n"
		    "and	w6, w2, %[CPSR_EL_MASK]		\n"
		    "cmp	w6, %[CPSR_EL0]			\n"
		    "b.eq	1f				\n"
		    "mov	w1, w2				\n"
		    "bl		_ml_panic_on_invalid_new_cpsr	\n"
		    "brk	#0				\n"
		    "1:						\n"
		    "str	w2, [x0, %[SS64_CPSR]]		\n",
		    [cpsr] "r"(cpsr)
		    );
#else
		if (!PSR64_IS_USER(cpsr)) {
			ml_panic_on_invalid_new_cpsr(iss, cpsr);
		}
		saved_state64(iss)->cpsr = cpsr;
#endif /* HAS_APPLE_PAC */
	}
}
set_saved_state_far source
static inline void
set_saved_state_far(arm_saved_state_t *iss, register_t far)
{
	if (is_saved_state32(iss)) {
		saved_state32(iss)->far = CAST_ASSERT_SAFE(uint32_t, far);
	} else {
		saved_state64(iss)->far = (uint64_t)far;
	}
}
get_saved_state_esr source
static inline uint64_t
get_saved_state_esr(const arm_saved_state_t *iss)
{
	return is_saved_state32(iss) ? const_saved_state32(iss)->esr : const_saved_state64(iss)->esr;
}
set_saved_state_esr source
static inline void
set_saved_state_esr(arm_saved_state_t *iss, uint64_t esr)
{
	if (is_saved_state32(iss)) {
		assert(esr < (uint64_t) (uint32_t) -1);
		saved_state32(iss)->esr = (uint32_t) esr;
	} else {
		saved_state64(iss)->esr = esr;
	}
}
get_saved_state_svc_number source
Extracts the SVC (Supervisor Call) number from the appropriate GPR (General Purpose Register). @param[in] iss the 32-bit or 64-bit ARM saved state (i.e. trap frame). @return The SVC number.
static inline int
get_saved_state_svc_number(const arm_saved_state_t *iss)
{
	return is_saved_state32(iss) ? (int)const_saved_state32(iss)->r[12] : (int)const_saved_state64(iss)->x[ARM64_SYSCALL_CODE_REG_NUM]; /* Only first word counts here */
}
is_neon_saved_state32 source
static inline boolean_t
is_neon_saved_state32(const arm_neon_saved_state_t *state)
{
	return state->nsh.flavor == ARM_NEON_SAVED_STATE32;
}
is_neon_saved_state64 source
static inline boolean_t
is_neon_saved_state64(const arm_neon_saved_state_t *state)
{
	return state->nsh.flavor == ARM_NEON_SAVED_STATE64;
}
neon_state32 source
static inline arm_neon_saved_state32_t *
neon_state32(arm_neon_saved_state_t *state)
{
	return &state->ns_32;
}
neon_state64 source
static inline arm_neon_saved_state64_t *
neon_state64(arm_neon_saved_state_t *state)
{
	return &state->ns_64;
}
arm_sme_z_size source
static inline size_t
arm_sme_z_size(uint16_t svl_b)
{
	return 32 * svl_b;
}
arm_sme_p_size source
static inline size_t
arm_sme_p_size(uint16_t svl_b)
{
	return 2 * svl_b;
}
arm_sme_za_size source
static inline size_t
arm_sme_za_size(uint16_t svl_b)
{
	return svl_b * svl_b;
}
arm_sme_saved_state_count source
static inline mach_msg_type_number_t
arm_sme_saved_state_count(uint16_t svl_b)
{
	assert(svl_b % 16 == 0);
	size_t size = sizeof(arm_sme_saved_state_t) +
	    arm_sme_z_size(svl_b) +
	    arm_sme_p_size(svl_b) +
	    arm_sme_za_size(svl_b);
	return (mach_msg_type_number_t)(size / sizeof(unsigned int));
}
arm_sme_z source
static inline uint8_t *
arm_sme_z(arm_sme_context_t *ss)
{
	return ss->__z_p_za;
}
const_arm_sme_z source
static inline const uint8_t *
const_arm_sme_z(const arm_sme_context_t *ss)
{
	return ss->__z_p_za;
}
arm_sme_p source
static inline uint8_t *
arm_sme_p(arm_sme_context_t *ss, uint16_t svl_b)
{
	return ss->__z_p_za + arm_sme_z_size(svl_b);
}
const_arm_sme_p source
static inline const uint8_t *
const_arm_sme_p(const arm_sme_context_t *ss, uint16_t svl_b)
{
	return ss->__z_p_za + arm_sme_z_size(svl_b);
}
arm_sme_za source
static inline uint8_t *
arm_sme_za(arm_sme_context_t *ss, uint16_t svl_b)
{
	return ss->__z_p_za + arm_sme_z_size(svl_b) + arm_sme_p_size(svl_b);
}
const_arm_sme_za source
static inline const uint8_t *
const_arm_sme_za(const arm_sme_context_t *ss, uint16_t svl_b)
{
	return ss->__z_p_za + arm_sme_z_size(svl_b) + arm_sme_p_size(svl_b);
}
arm_state_hdr source struct · arm_state_hdr reference
VALID_THREAD_STATE_FLAVOR() intentionally excludes ARM_SME_STATE through ARM_SME2_STATE, since these are not currently supported inside Mach exception ports.
struct arm_state_hdr {
	uint32_t flavor;
	uint32_t count;
}
arm_saved_state32 source struct
GPR context
struct arm_saved_state32 {
	uint32_t r[13];     /* General purpose register r0-r12 */
	uint32_t sp;        /* Stack pointer r13 */
	uint32_t lr;        /* Link register r14 */
	uint32_t pc;        /* Program counter r15 */
	uint32_t cpsr;      /* Current program status register */
	uint32_t far;       /* Virtual fault address */
	uint32_t esr;       /* Exception syndrome register */
	uint32_t exception; /* Exception number */
}
arm_saved_state32_tagged source struct
struct arm_saved_state32_tagged {
	uint32_t                 tag;
	struct arm_saved_state32 state;
}
arm_saved_state64 source struct
struct arm_saved_state64 {
	uint64_t x[29];     /* General purpose registers x0-x28 */
	uint64_t fp;        /* Frame pointer x29 */
	uint64_t lr;        /* Link register x30 */
	uint64_t sp;        /* Stack pointer x31 */
	uint64_t pc;        /* Program counter */
	uint32_t cpsr;      /* Current program status register */
	uint32_t reserved;  /* Reserved padding */
	uint64_t far;       /* Virtual fault address */
	uint64_t esr;       /* Exception syndrome register */
#if HAS_APPLE_PAC
	uint64_t jophash;
#endif /* HAS_APPLE_PAC */
}
arm_saved_state64_tagged source struct
struct arm_saved_state64_tagged {
	uint32_t                 tag;
	struct arm_saved_state64 state;
}
arm_saved_state source struct
struct arm_saved_state {
	arm_state_hdr_t ash;
	union {
		struct arm_saved_state32 ss_32;
		struct arm_saved_state64 ss_64;
	} uss;
}
arm_kernel_saved_state source struct
struct arm_kernel_saved_state {
	uint64_t x[10];     /* General purpose registers x19-x28 */
	uint64_t fp;        /* Frame pointer x29 */
	uint64_t lr;        /* Link register x30 */
	uint64_t sp;        /* Stack pointer x31 */
	/* Some things here we DO need to preserve */
	uint8_t pc_was_in_userspace;
	uint8_t ssbs;
	uint8_t dit;
	uint8_t uao;
}
arm_neon_saved_state32 source struct
struct arm_neon_saved_state32 {
	union {
		uint128_t q[16];
		uint64_t  d[32];
		uint32_t  s[32];
	} v;
	uint32_t fpsr;
	uint32_t fpcr;
}
arm_neon_saved_state64 source struct
struct arm_neon_saved_state64 {
	union {
		uint128_t  q[32];
		uint64x2_t d[32];
		uint32x4_t s[32];
	} v;
	uint32_t fpsr;
	uint32_t fpcr;
}
arm_neon_saved_state source struct
struct arm_neon_saved_state {
	arm_state_hdr_t nsh;
	union {
		struct arm_neon_saved_state32 ns_32;
		struct arm_neon_saved_state64 ns_64;
	} uns;
}
arm_kernel_neon_saved_state source struct
struct arm_kernel_neon_saved_state {
	uint64_t d[8];
	uint32_t fpcr;
}
arm_sme_saved_state source struct
struct arm_sme_saved_state {
	arm_state_hdr_t         hdr;
	uint64_t                svcr;
	uint16_t                svl_b;
	arm_sme_context_t       context;
}
arm_context source struct
Aggregated context
struct arm_context {
	struct arm_saved_state ss;
	struct arm_neon_saved_state ns;
}
arm_debug_state_t source typedef · arm_debug_state_t reference
Otherwise not ARM64 kernel and we must preserve legacy ARM definitions of arm_debug_state for binary compatability of userland consumers of this file.
typedef _STRUCT_ARM_DEBUG_STATE arm_debug_state_t;
uint128_t source typedef
NEON context
typedef __uint128_t uint128_t;
arm_sme_context_t source typedef
typedef struct { uint8_t zt0[64]; uint8_t __z_p_za[]; } arm_sme_context_t;
ml_panic_on_invalid_new_cpsr source
extern void ml_panic_on_invalid_new_cpsr(const arm_saved_state_t *, uint32_t) __attribute__((noreturn));
ml_pac_safe_interrupts_disable source
Used by MANIPULATE_SIGNED_THREAD_STATE(), potentially from C++ (IOKit) code. Open-coded to prevent a circular dependency between mach/arm/thread_status.h and osfmk/arm/machine_routines.h.
extern uint64_t ml_pac_safe_interrupts_disable(void);
ml_sign_thread_state source
Methods used to sign and check thread state to detect corruptions of saved thread state across exceptions and context switches.
extern void ml_sign_thread_state(arm_saved_state_t *, uint64_t, uint32_t, uint64_t, uint64_t, uint64_t);
ml_check_signed_state source
extern void ml_check_signed_state(const arm_saved_state_t *, uint64_t, uint32_t, uint64_t, uint64_t, uint64_t);