#include <arm/trap.h>
arm/trap.h
macroT_RESET
#define T_RESET 0
macroT_UNDEF
#define T_UNDEF 1
macroT_SWI
#define T_SWI 2
macroT_PREFETCH_ABT
#define T_PREFETCH_ABT 3
macroT_DATA_ABT
#define T_DATA_ABT 4
macroT_IRQ
#define T_IRQ 6
macroT_FIQ
#define T_FIQ 7
macroT_PMU
#define T_PMU 8
macroTRAP_NAMES
#define TRAP_NAMES "reset", "undefined instruction", "software interrupt", "prefetch abort", "data abort", "irq interrupt", "fast interrupt", "perfmon"
macroML_TRAP_REGISTER_1
#define ML_TRAP_REGISTER_1 "x8"
macroML_TRAP_REGISTER_2
#define ML_TRAP_REGISTER_2 "x16"
macroML_TRAP_REGISTER_3
#define ML_TRAP_REGISTER_3 "x17"
macroml_recoverable_trap
#define ml_recoverable_trap(code) __asm__ volatile ("brk #%0" : : "i"(code))macroml_fatal_trap
#define ml_fatal_trap(code) ({
ml_recoverable_trap(code);
__builtin_unreachable();
})